//Standard generators of A6 are a and b where a has order 2, b has order 4 and
//ab has order 5.
//Standard generators of the double cover 2.A6 = SL2(9) are preimages A and B
//where AB has order 5 and ABB has order 5.
//Standard generators of the triple cover 3.A6 are preimages A and B where A has
//order 2 and B has order 4.
//Standard generators of the sixfold cover 6.A6 are preimages A and B where A
//has order 4, AB has order 15 and ABB has order 5.
_LR := rec < recformat< F: GrpFP, AI: SeqEnum, G: GrpMat > |
      F := FreeGroup(2) >;
_LR`AI := [ [ a, b^-1*a*b^-1*a*b^-1*a*b^2*a^-1*b ], //A6.2_1 = S6
            [ a^-1, b^-1 ], //A6.2_2 = PGL(2,9)
            [ a^-1, b*a^-1*b*a^-1*b*a^-1*b^-2*a*b^-1]  ] //A6.2_3 = M_{10}
                  where a is (_LR`F).1 where b is (_LR`F).2;
//two constituents interchanged by _LR`AI[1], fixed by AutIms[2].

_LR`G := sub<GL(16,Integers()) |
\[ 1,0,0,0,0,0,0,0,0,1,0,-1,0,0,1,-1,0,0,0,0,0,0,0,0,
-1,-1,-1,0,0,0,0,1,2,-1,-1,1,0,-1,1,0,1,0,0,-1,0,0,1,
-1,0,0,0,0,0,0,0,0,0,0,0,0,0,-1,1,-1,1,-1,-1,1,1,0,1,
0,0,-1,-1,-1,0,0,0,0,0,0,0,0,0,0,-1,0,0,1,0,0,0,0,1,
-1,0,0,0,1,0,-1,0,0,0,-1,0,0,0,0,0,0,0,0,0,0,1,1,1,
0,0,-1,0,0,-1,0,0,1,0,-1,0,0,0,0,0,0,0,-1,-1,0,0,0,0,
1,0,0,0,0,0,0,0,0,0,-1,0,0,0,-1,0,0,0,0,0,0,0,0,0,0,
0,1,0,0,0,0,0,-1,0,0,0,1,0,0,0,0,0,0,0,-1,0,0,1,-1,
1,-1,-1,2,1,-1,0,-1,0,-1,-2,-1,0,0,1,-1,0,0,0,0,0,0,0,
0,0,0,0,0,0,1,0,0,0,0,0,1,0,0,0,0,0,-1,-1,0,0,0,0,0,
0,0,0,0,0,0,0,0,0,-1,-1,0,0,-1,0,0 ],
\[ -1,0,0,1,1,0,0,0,0,0,0,0,0,1,-1,0,0,0,0,-1,0,1,0,
0,0,0,0,0,0,0,-1,1,-1,0,0,1,1,0,-1,0,0,1,0,0,0,1,0,
-1,-1,1,1,0,0,0,0,1,-1,0,1,0,-1,0,1,0,-1,0,0,0,1,1,0,
0,0,0,0,0,0,1,-1,1,0,1,0,1,0,0,1,0,0,0,1,0,-1,0,0,0,
-1,0,1,-1,-1,0,-2,0,-1,1,-1,0,1,-1,1,-1,0,0,0,0,1,1,1,
0,0,-1,0,0,-1,0,0,1,1,0,0,-1,0,1,1,0,1,0,1,0,-1,0,0,
1,-1,0,1,-1,0,0,-1,0,-1,0,-1,0,0,-1,1,0,0,0,0,1,0,-1,
0,0,0,0,0,0,0,1,0,0,-1,1,1,0,-1,0,0,1,0,0,1,0,0,0,0,
0,-2,2,2,-1,-1,1,-1,1,-1,1,1,0,0,0,0,0,0,1,0,0,-1,0,
0,0,0,0,0,1,0,0,-1,0,0,1,1,-1,-1,1,1,1,0,0,1,0,-1,0,
0,1,0,1,1,-1,0,1,1,1,0,0,1,0,-1,0,0,1 ] >;

return _LR;
